Rambus, ChipAgents to accelerate chip design with agentic AI
As part of the agreement, Rambus is adopting the ChipAgents platform companywide, including deployment across its chip and silicon IP design and verification workflows to accelerate the pace of development.
Rambus, a provider of chips and silicon IP making data faster and safer, and agentic AI firm ChipAgents have announced a multi-faceted strategic agreement to accelerate chip design with agentic AI.
As part of the agreement, Rambus is adopting the ChipAgents platform companywide, including deployment across its chip and silicon IP design and verification workflows to accelerate the pace of development, Rambus said in a press release.
The two US companies will also collaborate to leverage Rambus’ semiconductor expertise and ChipAgents’ agentic AI platform and agentic workflows to enable greater speed and Quality of Results (QoR) in Rambus customers’ chip design process across their preferred design environments.
In addition, Rambus has become a strategic investor in ChipAgents, the press release said.
“ChipAgents is a fellow industry pioneer and a leader in agentic AI for chip design, making the company a strong strategic investment for Rambus,” said Luc Seraphin, president and chief executive officer of Rambus. “By adopting the ChipAgents platform, we see opportunities to accelerate the pace of chip and IP development, enhance engineering productivity, and strengthen our long-term position in AI and data-center infrastructure.”
“By combining Rambus’ design and IP expertise with our agentic AI platform, we aim to help engineering teams move more efficiently from design intent through silicon implementation while preserving their choice of tools and technologies,” said William Wang, founder and chief executive officer of ChipAgents.
Simon Blake-Wilson, senior vice president and general manager of Silicon IP at Rambus, said Rambus was looking forward to working with ChipAgents to drive greater value for their mutual customers by advancing the chip design and IP integration process.
