Xilinx acquires Modelware

Along with the expansion, Xilinx is introducing the industry’s first Field Programmable Gate Array (FPGA)-based 100G traffic management reference design to help customers speed their evaluation and implementation of high bandwidth packet processing applications. “By augmenting FPGAs that are already fine-tuned for high-bandwidth communications technology with Modelware’s traffic management/packet processing portfolio, Xilinx will be extending and accelerating its ability to deliver the benefits of industry-leading programmable platforms to our large base of wired communications customers,” said Krishna Rangasayee Corporate Vice President & General Manager, Xilinx Communications Business Unit. The Modelware acquisition strengthens Xilinx’s ability to deliver FPGA-optimized packet processing, switching, and traffic management solutions that address very granular (trending to 1+ million queues) per-flow bandwidth provisioning as well as scalable high-bandwidth traffic aggregation capabilities (20G to 100G and beyond) across the service provider, enterprise networking and data center markets. Today, Modelware has the only FPGA-based IP capable of scaling to up to 100G + and running traffic rates at 150 million packets-per-second with 64B packet size on a single FPGA. The Modelware technology also encompasses several legacy cores such as HDLC, ATM, PWE3, which Xilinx will continue to use in order to support legacy installations such as the mobile backhaul space, and help customers with maintaining existing deployments and offer an easy migration path from TDM to all-IP solutions without a need for new hardware.