Infineon and Synopsys collaborate on AI

Next generation Aurix microcontrollers from Infineon will integrate a new high-performance AI accelerator called Parallel Processing Unit (PPU) that will employ Synopsys’ DesignWare ARC EV Processor IP. According to the press release, this will enable Aurix to process the data from advanced sensors where it is currently bounded by real-time constraints, for example. The PPU will accelerate AI algorithms such as Recurrent Neural Network (RNN), Multi-Layer Perceptron (MLP), Convolutional Neural Network (CNN), and Radial Basis Function (RBF). "By developing the PPU together with Synopsys we make sure that our future microcontrollers will provide the safety features, throughput, and power-efficient performance necessary to meet increasing AI computational requirements, said Peter Schäfer, head of the microcontroller business line of Infineon’s Automotive Division. This will prepare the AURIX for data-hungry automotive applications such as future gateways, domain and zone controllers, engine management, electro-mobility and advanced driver assistance systems.” "In many AI-driven applications, safety is paramount, said Joachim Kunkel, General Manager of the Solutions Group at Synopsys. Combining the processing power and safety features of our ARC EV Processor with the proven architecture of the AURIX will enable the development of automotive systems at the highest levels of functional safety.