Cadence, Samsung Foundry deepen 2nm and 3D‑IC collaboration

US company Cadence and Samsung Foundry have announced the development of a full portfolio of Memory and Interface IP, and expanded certification of Cadence’s agentic AI digital, custom, 3D‑IC and system design and analysis (SDA) flows for Samsung Foundry’s second-generation 2nm process technology. 

This collaboration delivers a signoff‑ready platform for next‑generation AI infrastructure and physical AI designs across data center, edge and intelligent devices, according to a media release.

Building on the companies’ 2025 announcement of certified Cadence tools and IP on multiple Samsung Foundry nodes, including second-generation 2nm, this new multi-year agreement further broadens the Cadence portfolio of Memory and Interface IP, including NVIDIA NVLink-C2C-enabled interconnect and CUDA-X GPU-accelerated libraries spanning high-speed SerDes, PCIe, UCIe and all leading memory interfaces on second-generation 2nm. 

It also deepens enablement of certified Cadence flows so ecosystem partners can implement large AI, HPC and advanced system designs with higher performance, lower power and faster time to tapeout, the media release said.

“AI infrastructure and physical AI are pushing the industry into advanced node and 3D‑IC designs that demand far more capacity, integration and signoff confidence than ever before,” said Boyd Phelps, senior vice president and general manager of the Silicon Solutions Group at Cadence. “With this next phase of our Samsung Foundry collaboration, we’re giving joint customers a production‑proven platform to deliver the next-generation of AI and HPC systems to market faster.”

“Customers are increasingly drawn to Samsung Foundry’s second-generation 2nm for leading‑edge AI designs that must keep pace with the exploding demand across AI infrastructure and emerging physical AI applications,” said Jongshin Shin, executive vice president and head of Foundry Design Platform Development at Samsung Electronics. “Our expanded Cadence partnership delivers a robust semiconductor and 3D-IC platform with advanced Memory, Interface IP and AI-optimized flows for superior performance, efficiency and innovation.”

“As AI workloads scale and system architectures grow more demanding, the semiconductor ecosystem depends on tools and platforms that can keep pace with simulation and design complexity at advanced nodes,” said Timothy Costa, vice president and general manager of computational engineering, Nvidia. “By leveraging Cadence’s GPU-accelerated design flows on Samsung Foundry’s second-generation 2nm platform, we’re optimizing the performance and delivery of next-generation AI architectures and high-bandwidth interconnects.”