Rapidus team up with Keysight to improve yield
Japanese foundry Rapidus has entered into a strategic collaboration with Keysight Technologies Japan K.K. The companies have signed a Memorandum of Cooperation to develop a high-precision Process Design Kit (PDK) for Rapidus’ 2nm gate-all-around (GAA) semiconductors
The collaboration will leverage Keysight’s semiconductor parametric tester technology, analysis solutions, and expertise in semiconductor manufacturing process optimisation. The companies will first identify factors that improve PDK accuracy and evaluate their impact, while also identifying factors that contribute to improving the performance of semiconductor elements, circuits and factors that improve the yield of the wafer process.
Keysight has a long track record in supporting semiconductor manufacturing with parametric testers and process optimisation tools. Its new Keysight Wafer Operations Analytics Suite uses proprietary analysis algorithms and comprehensive data formats to identify root causes of manufacturing issues, improve yields, and reduce costs.
Rapidus began prototyping 2nm GAA transistors at its Innovative Integration for Manufacturing (IIM-1) facility in Chitose City, Hokkaido. The company is developing its Rapid and Unified Manufacturing Service (RUMS), a single-wafer process concept aimed at shortening turnaround times. Data from parametric testers will be analyzed using Keysight’s root-cause solution to address manufacturing challenges and support the development of a PDK compatible with Rapidus’ 2nm GAA process.
Rapidus expects to release the PDK to initial customers by Q1 2026, enabling them to begin prototyping.
