Samsung begins production of 3nm process node with GAA
Samsung Electronics today announced that it has started initial production of its 3-nanometer (nm) process node applying Gate-All-Around (GAA) transistor architecture.
The company says that the new optimised 3nm process achieves 45 percent reduced power usage, 23 percent improved performance and 16 percent smaller surface area compared to 5nm process.
According to a press release, Multi-Bridge-Channel FET (MBCFET), Samsung’s GAA technology implemented for the first time ever, defies the performance limitations of FinFET, improving power efficiency by reducing the supply voltage level, while also enhancing performance by increasing drive current capability, a press release reads.
For the second-generation 3nm process, Samsung hopes to reduce power consumption by up to 50 percent, improve performance by 30 percent and reduce area by 35 percent.
Samsung is starting the first application of the nanosheet transistor with semiconductor chips for high performance, low power computing application and plans to expand to mobile processors.
Samsung has grown rapidly as we continue to demonstrate leadership in applying next-generation technologies to manufacturing, such as foundry industry’s first High-K Metal Gate, FinFET, as well as EUV. We seek to continue this leadership with the world’s first 3nm process with the MBCFET. We will continue active innovation in competitive technology development and build processes that help expedite achieving maturity of technology, said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics, in the press release.
