© MIPS Technologies Electronics Production | March 28, 2011
MIPS Technologies plans 64-Bit Multi-threaded Multiprocessor IP Core
MIPS Technologies unveiled its plans for an IP core that combines a 64-bit processor architecture with simultaneous multi-threading (SMT) technology. The core, the first in a family of cores code named "Prodigy," will be officially launched later in 2011.
"With MIPS Technologies' deep expertise and tradition in both multi-threading and 64-bit processing, this is a natural next step," said Joseph Byrne, an analyst at The Linley Group and author of A Guide to CPU Cores and Processor IP. "As applications become more complicated and require more memory, there is a basic limitation of accessing memory with 32-bit addresses. That limit is becoming a barrier. Ultimately it will be necessary for many embedded applications to move to 64-bit architectures because of the practically unlimited address space they allow. The time is right for MIPS to introduce this product to the market, because the next generation of advanced communications and networking products will need this headroom." "With our forthcoming core, our customers can now quickly and easily develop MIPS64 solutions at a fraction of the cost and time it would take to develop a 64-bit core themselves," said Art Swift, vice president of marketing and business development, MIPS Technologies. "We're pleased to offer this solution, for which we are seeing increasing demand. Our customers can leverage not only the advanced 64-bit Prodigy IP core, but they will also benefit from the surrounding infrastructure and broad, mature ecosystem that are already in place for the MIPS64 architecture as well as multiprocessing and multi-threading on MIPS." The Prodigy core family will offer seamless code compatibility and an elegant upward migration path between the MIPS32 and MIPS64 architectures. This continues the tradition that started with the introduction in 1991 of the MIPS R4000 microprocessor, the world's first 64-bit microprocessor, which established complete binary compatibility between all 32-bit and 64-bit MIPS implementations.