Sanmina-SCI launch new technology

This new patent pending technology delivers next-generation levels of performance for Buried Capacitance applications for use in providing bypass capacitance inside silicon chip packages and high-performance PCBs. SuperBC includes a layer of Sanmina-SCI's patent pending eESD(TM) embedded electrostatic discharge (ESD) protection technology which can protect 100 percent of the I/O pins on a chip or PCB from voltage transients as high as 30K volts. Sanmina-SCI's PCB Division plans to collaborate with their joint development partner Shocking Technologies and BC Licensee Oak-Mitsui to integrate Xstatic(TM) voltage switchable dielectric (VSD) material with ultra-thin layers of nanopowder loaded Faradflex(TM) material. "As processor frequencies and bandwidth requirements continue to increase, PDS designers are looking for more and more low inductance capacitance for bypass," added Dudnikov. SuperBC can be utilized in high-performance server and telecom applications where it can significantly reduce, if not totally eliminate, the need for surface bypass or specialty capacitors. It will also be very enabling as a core for chip packaging substrates where higher levels of distributed capacitance can be placed very close to the silicon chip. With the addition of a layer of eESD, critical electrostatic discharge protection can be added to improve reliability of the electronic system."