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© Marvell
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Marvell partners with Micron, Samsung, and SK hynix on custom HBM

Marvell says it has pioneered a new custom HBM compute architecture, enabling XPUs to achieve greater compute and memory density. The company is teaming up with Micron, Samsung, and SK Hynix to define and develop custom HBM solutions for next-gen XPUs.

Marvell states in a press release that this new custom HBM compute architecture introduces tailored interfaces to optimise performance, power, die size, and cost for specific XPU designs. 

The company says that by serialising and speeding up the I/O interfaces between its internal AI compute accelerator silicon dies and the HBM base dies, the custom HBM compute architecture enhances XPUs. This results in greater performance and up to 70% lower interface power compared to standard HBM interfaces. 

Marvell says that its new AI accelerator (XPU) architecture enables up to 25% more compute, and 33% greater memory while improving power efficiency.

The company is now collaborating with Micron, Samsung and SK hynix on custom HBM solutions to deliver custom XPUs.


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