Rapidus collaborates with Cadence on leading-edge 2nm
Japanese semiconductor manufacturer Rapidus is collaborating with Cadence Design Systems to provide co-optimised AI-driven reference design flows and a broad IP portfolio.
The new collaboration will support the Rapidus 2nm gate-all-around (GAA) process and leverage the design and manufacturing benefits from its backside power delivery network (BSPDN) technology to provide design solutions and IP portfolio to customers.
As the semiconductor works to keep up with significantly increasing design challenges driven by the need for more computation, GAA and BSPDN manufacturing technologies are becoming vital to meet increasingly stringent power, performance and area requirements.
"Our broad collaboration with Rapidus for 2nm GAA BSPDN technology leverages Cadence's AI-driven solutions to solve real-world problems and meet customer needs," says Dr. Anirudh Devgan, president and CEO at Cadence, in a press release. "By bringing together Cadence's advanced interface and memory IP technology, reference flows and Rapidus' process technology, we're empowering the buildout of the AI infrastructure of tomorrow."
"Our collaboration with Cadence on 2nm BSPDN technology puts us at the industry's forefront, marking a major leap in semiconductor innovation for performance and efficiency. By combining our expertise, we're excited to set new technology standards and create transformative solutions for our mutual customers and the industry," adds Dr. Atsuyoshi Koike, CEO of Rapidus.
