ASML and imec open joint lab

After a build and integration period of years, the lab is ready to provide leading-edge logic and memory chip makers, as well as advanced materials and equipment suppliers, access to the first prototype High NA EUV scanner (TWINSCAN EXE:5000) and surrounding processing and metrology tools.

The opening of the joint ASML-imec lab represents a milestone in preparing High NA EUV for high-volume manufacturing – with is anticipated to happen in the 2025–2026 timeframe. 

By giving leading-edge logic and memory chip manufacturers access to the High NA EUV prototype scanner and surrounding tools, imec and ASML support them in de-risking the technology and develop private High NA EUV use cases before the scanners will be operational in their production fabs.

“High NA EUV is the next milestone in optical lithography, promising the patterning of metal lines/spaces with 20 nm pitch in one single exposure and enabling next generations of DRAM chips. This will improve yield and reduce cycle time and even CO2 emissions compared to existing multi-patterning 0.33 NA EUV schemes. It will therefore be a key enabler to push Moore’s Law well into the ångström era. We are now thrilled to explore these capabilities in real life, using the prototype High NA EUV scanner,” says Imec’s president and CEO Luc Van den hove ina press release.

For imec and its partners, the High NA EUV Lithography Lab will act as a virtual extension of the company's 300 mm cleanroom in Leuven.

“The ASML-imec High NA EUV Lithography Lab provides an opportunity for our EUV customers, partners and suppliers to access the High NA EUV system for process development while waiting for their own system to be available at their factories. This type of very early engagement with the ecosystem is unique and could significantly accelerate the learning curve on the technology and smoothen the introduction in manufacturing,” adds ASML’s President and CEO Christophe Fouquet.