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© SK Hynix Business | June 15, 2022

SK hynix pick Lam solution to enhance DRAM production

SK hynix has selected Lam Research's dry resist fabrication technology as a development tool for two key process steps in the production of advanced DRAM chips.

The dry resist technology was introduced by Lam in 2020 and extends the resolution, productivity, and yield of Extreme Ultraviolet (EUV) lithography. Now Lam Research announces in a press release that SK hynix has chosen innovative dry resist technology for the production of advanced DRAM chips.

"Lam's dry resist technology is a game-changer. By innovating at the material level, it addresses EUV lithography's biggest challenges, enabling cost-effective scaling for advanced memory and logic," says Richard Wise, vice president and general manager of the dry resist product group at Lam. "We are proud to continue our long-standing collaboration with SK hynix to accelerate DRAM technology innovations."

Through Lam's work with SK hynix – as well as ongoing collaboration with ecosystem partners – on dry resist technology, the company aims to remove the roadblocks associated with scaling to future memory nodes with EUV lithography.

SK hynix intends to use Lam's dry resist underlayer and dry development processes for advanced DRAM patterning. 

"As DRAM continues to scale, innovations in EUV patterning are critical for delivering the performance needed for today's increasingly connected devices at a cost that is right for our customers," adds BK Lee, head of R&D process at SK hynix in the press release. "The dry resist technology that we are working on with Lam enables exceptionally precise, low defect, and lower cost patterning."

As chipmakers move to advanced technology nodes, they must resolve ever smaller and finer chip designs on the wafer. First developed by Lam in collaboration with ASML and IMEC, dry resist technology offers several advantages over conventional chemically amplified resist patterning for EUV lithography. The solutions enhances EUV sensitivity and the resolution of each wafer pass – which in turn enables patterns to better adhere to the wafer and thus improve performance and yield.

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June 21 2022 3:19 pm V20.6.1-1