A*STAR and Soitec to develop next-gen SiC semiconductors

The parties are looking to leverage Soitec’s proprietary technologies such as Smart Cut and IME’s pilot production line to create 200mm diameter SiC semiconductors substrates. The companies states that the joint research will contribute towards developing a holistic SiC ecosystem and boosts semiconductor manufacturing capabilities in Singapore and the region. The research collaboration is planned to run until mid-2024. By 2024 the companies aims to have developed SiC epitaxy and MOSFET fabrication processes for Smart Cut SiC substrates to produce higher quality microchip transistors with less defects and enhanced yield during the manufacturing process. “This joint research between A*STAR’s Institute of Microelectronics and Soitec to develop next-generation semiconductor devices using innovative technologies is made possible by both organisations’ deep capabilities in R&D,” says Mr. Terence Gan, Executive Director of IME in a press release. “We look forward to working together with Soitec to add value to the local R&D ecosystem and the growing pool of silicon carbide players in the semiconductor industry.” “This is a great opportunity for us to partner with Singapore’s Institute of Microelectronics and demonstrate SmartSiC substrate’s scalability to 200mm,” adds Christophe Maleville, CTO and Senior Executive VP at Soitec. “The collaboration paves the way for the development of advanced epitaxy solutions to produce higher quality SiC wafers with energy-efficient characteristics, given the exciting potential of this material. As the main beneficiaries of this new process, the semiconductor ecosystem in Singapore will be given the opportunity to validate the superior energy efficiency of the SiC wafers produced through our collaboration.”