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Soft Machines purchases test system from Teseda

Silicon Valley-based semiconductor startup company, Soft Machines Inc., selects Teseda's diagnostic test system for first silicon bring-up, diagnosis and optimisation.
Soft Machines, a licenser and co-developer of VISC architecture-based microprocessor and SoC products for loT, mobile and cloud markets, has purchased the Teseda Diagnostic Test System for bench-top stimulus, test pattern debug, validation, and device failure mode stimulation.

"Soft Machine's VISC architecture revives CPU performance-per-watt scaling by incorporating the new concept of virtual cores and virtual threads," stated Mohammad Abdallah, Co-Founder, President and Chief Technology Officer for Soft Machines. "The Teseda Diagnostic Test System helped us to quickly bring-up test patterns and validate functionality of the silicon which featured a break-through new architecture."

"We were delighted with Soft Machines' selection of our Diagnostic Test System as their platform of choice. By using this system they achieved remarkable results with their 'bleeding edge' first silicon," said Armagan Akar, Chief Executive Officer at Teseda Corporation. "Soft Machines' experience is another strong validation of our well-thought-out DFT methodology, resulting in major cost and time savings by this purpose-built bench-top diagnostic silicon verification system."

The system was first installed in Q2, 2014 under a rent-to-own scenario and later converted to purchase.

The bring-up time spent after first silicon arrival continues to increase with design size, complexity and geometry shrinkage as does the difficulty and effort required to debug silicon errors. The Teseda Diagnostic Test System provides the means for accessibility of internal scan architectures to specifically exploit the benefits of scan for first silicon bring-up and also eliminates the need for expensive ATE at this stage of the development.

System users experience rapid verification of silicon functionality, achieving silicon debug in days versus months resulting in low cost silicon characterization and validation.

Design and product engineers implement, test and verify device software modifications to maximize performance in a desktop or bench-top work environment, and to allow remote access to the tool set from anywhere in the world
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