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Application Notes |
8 bitter for IoT? - criteria for choosing 8051 IP Cores
Many, especially young engineers, when asked about 8051 MCUs ask if these good old rascals still exist. But it looks like history tends to repeat itself.
When Intel introduced 51 CPU in the beginning of 80’ in the 20th century, I bet no one would ever believe how popular it become. Nevertheless almost every five years many predicted the sudden death of Intel’s MCU. It should be dead by 1990, then in the beginning of 21st century many suggested that new era doesn’t need good old fashioned 8 bitters any more. And where are we now? 2013 is almost in the end and 8051 CPU are still in the game.
Moreover, they seem to have a stable market share and their production number is still… growing. When we look at these numbers, we can easily see that only in 2013 6.7 billion 4- and 8-bit MCUs will be shipped, up 6% over last year. Considering that so many feel 8 bits is dead that's pretty astonishing growth, especially when we compare it with the previous years. Those parts are up 40% since 2009.
So after this this lengthy introduction (yes, I just wanted to say that we all writing code for an 8051, are not the dinosaurs), let me just move forward. Of course we cannot say that 8 bitters will beat the 32 bit CPUs popularity, but believe me – 8051 designed in the 21st century are something completely different that 51s designed 20 years earlier. The best example is eg DQ80251, world’s fastest 8051 CPU, more than 66 times faster than original presented by Intel.
8051 still in the game?
The 8051 was the major 8-bit microcontroller I used during my studies at university. All of our microcontroller classes were based on this device, and all of the students were convinced that the 8051 was a good all-around product, but what about the more demanding applications? The 12MHz maximum clock frequency and the need for 12 clocks per machine cycle (with most instructions executing in one or two machine cycles) associated with the original 8051 architecture were insufficient to run more advanced applications that required higher-performance MCUs.
This led some of us to start to think about how one might improve the performance of the 8051. Thus it was that, in 1999, just after my graduation, I co-founded Digital Core Design (DCD) with two of my colleagues and we started work on improving the 8051 architecture. To this day, we believe that due to its popularity and widespread use, which has resulted in deep familiarity by highly trained electronics engineers around the world, the 8051 continues to offer an excellent solution for an extremely wide variety of embedded systems and consumer electronic devices.
Many MCU providers and IP core developers have created some extremely powerful MCUs that are fully compatible with the original 8051. The architecture and implementation of these new versions is so innovative that, as recently as a few years ago, no one would have believed that such power and performance could be possible.
The original 8051 devices developed in 1980 supported a maximum clock frequency of 12MHz. By comparison, today’s state-of-the-art DQ8051 from DCD can now be easily clocked at more than 300MHz. Some people might say that it’s easy to overclock a CPU, but there’s much more to this than simply increasing the frequency of the system clock.
First, we completely redesigned the architecture. After many years of work, we had developed an architecture that allowed our processor to perform tasks up to 25 times faster than the original 8051 running at the same frequency. The instruction set of our DQ8051 is exactly the same as conventional 8051 processors, but internally those instructions are executed in a completely different manner to assure the highest possible increase in performance.
Let’s calculate just how fast the DQ8051 really is. As I said before, this architecture can execute applications up to 25 times faster than the original devices, even when running at the same 12MHz clock frequency. When we now take into account the fact that the DQ8051 can run at 300MHz, which is 25 times the clock frequency of the original devices, the result is a performance increase of 25 x 25 = 625. This means that for the original 8051 to achieve the same performance as the DQ8051, it would have to be clocked at 12 x 625 = 7,500MHz or 7.5GHz.
And for those who will say, that it’s still not enough, there’s something more, because the numbers are even higher when we come to consider the latest and greatest version available on the market. As I mentioned in the beginning, DCD’s DQ80251 architecture achieves 66 times the speed of a traditional 8051 architecture. It can be also clocked at up to 300MHz. So once again we can ask ourselves: What would be the necessary frequency of the original 8051 to achieve the same performance? The result is 12 x 25 x 66 = 19,800MHz or 19.8GHz.
During the past three decades, almost every year has brought improved 8051 microcontrollers to the market. There’s only one small “but” - the main criterion is that every new device has to be fully software compatible with the 8051 standard. This provides engineers with the ability to improve their applications and to renew their designs, making them faster and more powerful, without having to make any changes to the code written for the 8051 from decades before.
8051 rocks
Moreover, 8051 IP Cores have much more advantages than “just” the performance. 51s soft IP cores can be implemented in both FPGAs and ASICS. This means that designers now have the ability to define their own configurations for the MCU. For example, engineers are no longer limited to just one UART, two or three counter-timers, and an insufficient quantity of interrupt lines. Now, we all can add extra UARTs, Ethernet MAC controllers, SPI, CAN, USB, I2C, and a host of other interfaces. Designers can also add their own dedicated hardware accelerator functions, thereby allowing them to further personalize their MCUs. Additionally, for applications that need it, the DQ8051 and DQ80251 cores can be equipped with arithmetical co-processors to make floating-point computations even faster.
One might ask, is that all what you can do with 8051? The answer is easy, of course not, cause when you asked experienced IP Core provider about additional pieces of that puzzle, you can get a “brand new world”.
It's been years since anyone interested in purchasing an IP core would say "OK, I just need an 8051 -- what's the performance and the price?" Now, pure IP is far less interesting in isolation. That's why, if you're selecting and integrating 8051 in your design, ask yourself or third-party vendor, about all of the additional stuff like peripherals, deliverables, and configurability issues. Let me based this example on the IP Cores I’m working with, cause they’ve been a part of my life since 1999, so they should be good representatives…
8051 configuration
Let's say that some customer calls my company, Digital Core Design (DCD), and asks for an 8051 IP core. The first step would be to choose the most appropriate solution for his target application, you can see a brief comparison shown below:
Once you have determined what combination of performance, size, and power consumption is best-suited to your project, we're ready for the next step, which is to select the necessary combination of peripherals. For example, the 8051 can be augmented with a wide variety of peripheral functions as follows:
Feature | DQ8051 | DT8051 | DP8051 | |
Architecture SPEED | x 25.1 | x 8.1 | x 15.5 | |
Dhrystone SPEEDCPU | 0.18527 DMPIS/MHz | 0.0763 DMIPS/MHz | 0.106 DMIPS/MHz | |
Dhrystone SPEEDPWR | 0.23650 DMPIS/Mhz(CPU+DPTRs) | N/A | 0.146DMIPS/Mhz(CPU+DPTRs) | |
Gate countCPU | 7250 ASIC Gates -CPU | 3200 ASIC Gates – CPU | 5900 ASIC Gates -CPU | |
Gate countPWR | 8000 ASIC Gates –CPU+DPTRs | N/A | 6450 ASIC Gates –CPU+DPTRs | |
CODE size | 64 kB | 64 kB | 64 kB | |
CODE banking | YES | YES | YES | |
CODE writes | YES | YES | YES | |
Sync. CODE/XDATA | YES 2 spaces | YES up to 2 spaces | YES up to 3 spaces | |
Async CODE/XDATA | YES 2 spaces | YES up to 2 spaces | YES up to 3 spaces | |
XDATA size | 16 MB | 64 kB | 16 MB | |
IDATA type | 64B to 256B Dual port | 64B to 256B Single port | 64B to 256B Single port | |
Debugger | YES – JTAG DoCD made by DCD | YES – TTAG DoCD made by DCD | YES – JTAG (or TTAG) DoCD made by DCD | |
5-wire interface | 2-wire interface | 5-wire interface | ||
CODE/XDATA wait states | YES | NO | YES | |
Harward Architecture | YES | YES | YES | |
Von-Neuman Architecture | NO | YES | YES | |
Power Management(PMU) | STOP, PMM with Switchback | STOP, PMM with Switchback | STOP, PMM with Switchback | |
Number of clock trees | 1 | 1 | 1 | |
Scan test ready | YES | YES | YES | |
ASIC/FPGA proven | YES | YES | YES | |
Gate countFULL | 9900 ASIC Gates - DQ8051 | 5600 ASIC Gates - DT8051 | 7650 ASIC Gates – DP8051 | |
Included peripherals | 32-bit PORT; Timers 0,1 | 8-bit PORT; Timers 0,1 | 32-bit PORT; Timers 0,1 | |
for “Gate Count FULL” | CPU; UART0; PMU; INT 0-1 | CPU; UART0; PMU; INT 0-7 | CPU; UART0; PMU; INT 0-1 |
- DUSB2: USB 2.0 device including HID (human interface device), MS (mass storage), and audio devices
- Parallel I/O ports
- UART's
- Timers?counters with compare capture
- Watchdog timer
- Power management unit
- I2C bus interfaces, master and slave
- Serial peripheral interface (SPI) master/slave
- Floating point math coprocessors
- Media access controller (DMAC)
- 32-bit multiply divide unit
- Data pointers
- Synthesizable Verilog or VHDL source code for the core/peripheral
- Verilog or VHDL test bench environments: (Active-HDL automatic simulation macros, NCSim automatic simulation macros, ModelSim automatic simulation macros, tests with reference responses...)
- Technical documentation (installation notes, HDL core specifications, datasheets, instruction set details, test plan and code coverage reports…)
- Synthesis scripts
- Example applications and/or reference designs
- Technical support (including implementation support; "x" months of maintenance; access to core updates and minor and major versions changes; access to documentation updates; phone and email support...
- Extended OMF-51 produced by the Keil compiler
- OMF-51 produced by the Tasking compiler
- OMF-51 produced by the Franklin compiler
- Standard OMF-51 produced by some 8051 compilers
- Extended OMF-251 produced by the Keil compiler
- NOI format file produced by the SDCC-51 compiler
- Intel HEX-51 format produced by every 8051 compiler
- Intel HEX-386 format produced by every 80390 & 80251 compiler
- BIN format produced by every 8051 & 80390 & 80251 compiler