Faraday and UMC for 300mm gate 40nm customer SoC

The 300 million gate-count IC was built on UMC's volume production 40nm process. By comparison, a standard USB 3.0 IC controller chip has 12 million gates. The much more complex chips integrate over 100 types of IP into the design, and feature an extra large 100MB SRAM size to power next generation communication products. "Typically, this kind of complex IC requires enormous time and engineering resources to come to fruition," said Roger Cheng , vice president of ASIC Business at Faraday. "Working closely with UMC and our customer, we were able to leverage Faraday's strong know-how in IP development, abundant IP pool, efficient SoC design platform, and long-term familiarity with the foundry process to quickly expedite the delivery of this SoC. We look forward to bringing this product to high volume for our customer in the coming months." S.C. Chien , vice president of Advanced Technology Development division at UMC, said: "With a design partner with proven SoC capabilities such as Faraday, customers can leverage the UMC-Faraday team to realize their complex SoC needs as demonstrated by the success of this 300 million gate-count IC. These large die-size SoCs are nearly four times the size of normal ICs, demonstrating the high complexity involved in its design. UMC's ability to rapidly bring these sophisticated SoCs from the design stage to manufacturing underscores our proven advanced technology and world-class manufacturing capabilities gained through over 30 years of semiconductor industry experience."