The ASIC is targeted for use in future Space Science and Earth Observation missions. The 18 month development aims to design an ASIC dedicated to large format cryogenic NIR/SWIR Detector. The complex presents several challenging features: - 77K operation temperature - Radiation hardness - Fully programmable sequencer on chip - 16bits analog to digital conversion chain The project will benefit from the experience of each consortium partner. Caeleste is responsible for the project supervision and the design of the analog section. Easics is designing the digital section using IMEC standard DARE library for radiation hardness. Easics is also in charge of the test system development. SELEX Galileo joins as IR/cryogenic expert and will provide support for cryogenic operation, test and evaluation. Following the successful completion of this demonstrator phase, an industrialized version will be envisaged, aiming at providing such flexible and standard ASIC to European Companies willing to simplify the design of infrared instruments for space application.