Sematech and centrotherm partner

centrotherm thermal solutions, a 100 percent subsidiary of centrotherm photovoltaics AG and a developer of process tools and high-tech production systems for the manufacture of semiconductor components, has joined its Front End Processes (FEP) program, and will work with Sematech to develop new low temperature processing techniques for future high-performance logic and memory devices. Continued scaling will require new materials and new device concepts that necessitate lower thermal budget process flows. For example, to enable the introduction of high mobility semiconductors as the channel material of transistors, low temperature processes are critical to preserve the beneficial properties of channel materials. Similarly, advanced memory technologies require superior isolation as well as low thermal budget oxidation approaches – especially for metal oxide RRAM devices. Plasma-based processing techniques offer an attractive approach to help realize such low-thermal budget processes to enable the integration of new materials into emerging device technologies. As a member of this program, centrotherm will closely collaborate with experts from Sematech’s FEP research team, to develop plasma-based low temperature techniques using Sematech test structures. The goal of this team would be to demonstrate their applicability towards usage in high performance logic transistors and memory devices in sub 14 nm advanced technology nodes. “Sematech provides centrotherm with an excellent test device and characterization platform to help centrotherm identify and demonstrate applications for our tool,” said Peter Augustin, CEO of centrotherm thermal solutions GmbH & Co. KG. “This collaboration will enable centrotherm to showcase low temperature processing capabilities to our customers and is part of our ct focus program to expand our Semiconductors & Microelectronics area.” The goal of Sematech’s FEP program is to provide novel leading-edge materials, processes, structural modules and electrical and physical characterization methods to support the continued scaling of logic and memory applications.