Components | September 27, 2011

NetLogic selects ATopTech’s physical design sSolutions for 28nm designs

NetLogic Microsystems has selected ATopTech’s Aprisa physical design solution for designing complex SoC designs at 28nm. Aprisa will be used to design NetLogic Microsystems’ next generation XLP II multi-core processors.
”We chose ATopTech's Aprisa for our 28nm tapeouts because it offers DRC clean routed designs and timing clean databases across multiple corners and modes. Aprisa's router was tailored to handle complex 28nm design rules and its revamped timing engine offers good timing correlation with SI to our sign-off STA tool,” said Nazar Zaidi, vice president of engineering at NetLogic Microsystems. “After successfully using Aprisa on our XLP832 multi-core processor development in the 40nm node, ATopTech was the clear choice for our future 28nm designs.”

NetLogic Microsystems' XLP832 multi-core processor integrates 32 NXCPUs featuring quad-issue, quad-threaded and superscalar out-of-order capabilities. It contains a tri-level cache architecture providing a total of 12MBytes of cache, a high-performance memory subsystem with four on-chip 72-bit DDR3 memory controllers with 51.2 Gbps of bandwidth, a low-latency, high-speed fast messaging network and numerous autonomous acceleration engines that offload processing tasks from the processor core including a network acceleration engine, a packet ordering engine, a security engine, a compress/decompression engine and an 8-channel DMA and storage acceleration engine.

“ATopTech solutions deliver shorter design time, improved productivity and quality results to leading-edge SoC designers,” said Eric Thune, vice president of sales and marketing at ATopTech. "We are pleased to continue working with NetLogic Microsystems as they expand into smaller geometries. Their decision to use ATopTech’s solutions for their 28nm designs validates the competitive advantage offered by our tools.”


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