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Components |

Posedge selects EnSilica’s eSi-3250 processor

Posedge, based in Sunnyvale (California, USA), has licensed EnSilica's high-performance eSi-3250 32-bit processor core for a new Residential and SMB Gateway solution that performs Wire-Speed Routing at multi-gigabit rates.

Posedge will initially use its next generation Residential and SMB Gateway processor in a 40nm SoC project it is currently developing for a customer. Posedge is using both EnSilica’s Windows and new Linux-based toolchain to underpin the development process. Posedge’s new Residential and SMB Gateway processor is a 7-core design that utilises six eSi-3250 cores as identical datapath processors performing such functions as packet classification and packet editing, and another as a utility processor implementing high level functions, IPSec software and TCP offload. Posedge chose the eSi-3250, the top-end core in EnSilica’s eSi-RISC family of processors, following an extensive evaluation of three different CPU cores, as it exhibited the best cost/performance metrics. “Of the three processors that we evaluated, the eSi-3250 was a clear winner, proving extremely conducive to the implementation of multicore SoCs,” said Chakra Parvathaneni, Vice-President of Marketing for Posedge. “EnSilica has provided us with an extremely flexible set of cores in the configurations required to deliver the functionality we need within a single SoC. The eSi-3250 is also backed by a toolchain capable of supporting multicore debug and validation. We are now actively looking to use the eSi-RISC family in other solutions we are developing, including a new 802.11 WLAN MAC/PHY solution.” “Where silicon area and performance are important, our eSi-RISC family of processors has once again shown it can deliver even for the most demanding multicore and high performance networking applications like Residential and SMB Gateways,” said Ian Lankshear, Managing Director of EnSilica. “The eSi-3250 was a clear winner in Posedge’s evaluation, giving them a high performance solution with excellent code density, minimized silicon area, low gate count and an easily maintained C/C++ code capability for future developments and upgrades. Our flexible licensing model also puts them in a commercially advantageous position in the market.”

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April 15 2024 11:45 am V22.4.27-2
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