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Electronics Production | January 11, 2006

STMicro leads CLEAN

STMicroelectronics announced its leadership role in a new European Integrated Project called CLEAN (Controlling Leakage power in NanoCMOS SoCs).
The three-year research project, co-funded by the European Commission, aims to extend battery life and reduce the power consumed by electronics by finding solutions to controlling leakage currents in CMOS designs below 65nm.

The importance of reducing leakage currents has grown tremendously with the development of devices manufactured using 65nm-and-below features. Leakage currents are acknowledged by circuit designers as the primary showstopper for future generations of electronic circuits and systems if the industry cannot find and adopt proper counter-measures.

To be successful, and thus lead the capability of fabricating chips with sub-65nm technologies, leakage-reducing counter-measures must be rooted in the design domain, as continuous process improvements are not expected to be sufficient to cope with the increased leakage currents in next-generation semiconductor devices.

The new generation of leakage power models, design methodologies and techniques, and prototype EDA (Electronic Design Automation) tools, developed within the project, promises to manage and minimize leakage power even for very complex systems.

Within the CLEAN project, ST will manage and coordinate all of the activities of a consortium of 14 European partners, who together feature an exceptional mix of competence (semiconductor vendors, EDA vendors, and renowned academic and research institutes) and the appropriate mobilization of resources to guarantee the successful achievement of all of the project objectives.

“The CLEAN project will help overcome the technological shortcomings on the 65nm and below technology nodes, in particular leakage currents, process variability, and unreliability,” said the project's leader Roberto Zafalon, R&D Program Manager of Advanced System Technology, STMicroelectronics. “The project's outcome will allow the decrease of power consumption in next-generation devices and, at the same time, increase design productivity, thus improving the manageability of the additional complexity of these devices.”

The CLEAN project's results are expected to span different aspects of low-leakage design, from modeling to optimization, from design solutions to design methods and tools. Thanks to the competence mix of the project partners, encouraged by the European Commission, CLEAN's results will provide great business opportunities for the advancements of the European nanoelectronics industry in different business sectors, i.e. consumer electronics and EDA tools.

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