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PCB | October 28, 2009

Cadence release new SiP and IC sackaging software

New software release with co-design and design chain enablement technology helps engineers shorten design cycles through improved design miniaturization capabilities.
The Cadence Allegro 16.3 release features SiP Layout XL, a new product that puts co-design directly in the package design environment. The new co-design technology enables the optimization of designs between packaging and IC design teams without requiring packaging designers to learn IC design tools. Design chain collaboration is further enhanced through new SiP Finishing technology available with Allegro Package Designer (APD).

The new technology enables package designers, package design services companies, and offshore assembly and test companies (OSAT) to participate in the multi-die SiP design chain using a co-design methodology. It enables data to be passed easily among design chain partners using Cadence co-design technology. Companies deploying version 16.3 can benefit from shorter design cycles, improved productivity and reduced costs.

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