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Components | December 09, 2011

Higher-k Gate process for 14nm manufacturing

ASM qualifies new Higher-k Gate process for 14nm manufacturing.
ASM International N.V. announced the successful demonstration of a new 14nm high-k gate dielectric process that achieved less than 6 angstroms equivalent oxide thickness (EOT) at a customer's 14nm R&D line, an improvement of about 40% from the current advanced nodes.

The new high-k process improves device performance by enabling faster switching and lower leakage current, while reconfirming the extendibility of hafnium based high-k dielectrics. Using ASM's most advanced Pulsar ALD tool, a hafnium based material with a higher-k value than the current baseline was qualified at the customer's R&D facility.

"ASM was the first to introduce hafnium-based high-k dielectrics for transistor gates, and we are now working with key device manufacturing leaders on scaling next-generation high-k metal gate technology," said Glen Wilk, Sr. Director of ALD Products at ASM. "The new process leverages ASM's extensive understanding of high-k metal gates, our technology leadership in ALD, and the extendibility of our Pulsar ALD process module. Together, these three factors give ASM a clear advantage in providing our customers with the smoothest transition to manufacturing nodes below 20nm, for both planar and 3D devices."

Developed on the Pulsar ALD tool without the need for additional clustered process steps, the new process achieves less than 6Å EOT while maintaining gate leakage below 1A/cm2 to meet 14 nm high-k metal gate (HKMG) logic technology requirements.

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