SK Hynix ramps production of high bandwidth memory

HBM1 utilises through-silicon-via technology and microbumps to interconnect 4 DRAM die and 1 base die to achieve 1GB DRAM density per device. High Bandwidth Memory is designed to be assembled onto interposers allowing high speed memory interconnect to GPUs, CPUs, ASICs and FPGAs. In addition to the mass production announcement, SK Hynix recognises AMD as a key partner in enabling HBM1 technology. “AMD has pioneered the adoption of HBM1 technology in graphics applications achieving unprecedented memory bandwidth while reducing memory subsystem power” said Joe Macri, AMD Corporate Vice President and Product CTO, “Integrating AMD’s Graphics Processing Unit and HBM1 on a single 2.5D silicon interposer represents a major step forward in high performance graphics applications”. “High Bandwidth Memory technology is the first JEDEC standard memory targeted for interposer system-in-package applications, effectively breaking down the memory wall barrier through tight integration of DRAM and high performance processors” said Kevin Widmer, SK Hynix America Vice President of Technical Marketing, “The performance requirements of emerging graphics, computing and networking applications are driving the demand for High Bandwidth Memory”.