Brite claims first-pass silicon success

Brite Semiconductor's independently designed 40nm chip is the result of Brite's collaboration with Synopsys Inc. and SMIC. It integrates Synopsys' DesignWare embedded memory and standard cell libraries, and SMIC's independently developed PLL and I/O IP. The successful implementation of the design has proven Brite's front-end and back-end design flows on 40nm advanced technology. "The expertise of Brite's design team and its rigorous design methodology have resulted in the first-pass silicon success of our 40nm chip. This marks a key milestone for Brite Semiconductor, and further establishes Brite as a premier global design service company," said Dr. Charlie Zhi, CEO of Brite Semiconductor. "The collaboration between Synopsys and Brite demonstrates our commitment to serve our customers with solutions that accelerate design tape-out. The first-pass silicon success of Brite's first 40nm design validates Synopsys' reference design flow on SMIC's 40nm advanced technology, and reflects the strong capability of Brite's design team," said Robert Li, General Manager of Synopsys China. "We are pleased to see that our collaboration with Brite and Synopsys has achieved first-pass silicon success on SMIC's 40nm advanced technology. This joint effort demonstrates the capability of SMIC's 40nm advanced technology to effectively support leading-edge designs. We are confident that Brite will continue to forge close partnerships with its customers and quickly ramp into production," said Chris Chi, Senior Vice President and Chief Business Officer of SMIC.